{"year":"2021","publication_status":"published","citation":{"ama":"Ahmed QA. Hardware Trojans in Reconfigurable Computing. In: 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC). IEEE; 2021:1-2. doi:10.1109/VLSI-SoC53125.2021.9606974","mla":"Ahmed, Qazi Arbab. “Hardware Trojans in Reconfigurable Computing.” 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC), IEEE, 2021, pp. 1–2, doi:10.1109/VLSI-SoC53125.2021.9606974.","bibtex":"@inproceedings{Ahmed_2021, title={Hardware Trojans in Reconfigurable Computing}, DOI={10.1109/VLSI-SoC53125.2021.9606974}, booktitle={2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC)}, publisher={IEEE}, author={Ahmed, Qazi Arbab}, year={2021}, pages={1–2} }","alphadin":"Ahmed, Qazi Arbab: Hardware Trojans in Reconfigurable Computing. In: 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC) : IEEE, 2021, S. 1–2","short":"Q.A. Ahmed, in: 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC), IEEE, 2021, pp. 1–2.","chicago":"Ahmed, Qazi Arbab. “Hardware Trojans in Reconfigurable Computing.” In 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC), 1–2. IEEE, 2021. https://doi.org/10.1109/VLSI-SoC53125.2021.9606974.","apa":"Ahmed, Q. A. (2021). Hardware Trojans in Reconfigurable Computing. In 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC) (pp. 1–2). Singapore, Singapore: IEEE. https://doi.org/10.1109/VLSI-SoC53125.2021.9606974","ieee":"Q. A. Ahmed, “Hardware Trojans in Reconfigurable Computing,” in 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC), Singapore, Singapore, 2021, pp. 1–2."},"user_id":"220548","title":"Hardware Trojans in Reconfigurable Computing","date_created":"2024-10-17T12:46:57Z","publication":"2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC)","status":"public","_id":"5057","author":[{"orcid_put_code_url":"https://api.orcid.org/v2.0/0000-0002-1837-2254/work/169762576","last_name":"Ahmed","full_name":"Ahmed, Qazi Arbab","id":"257333","first_name":"Qazi Arbab","orcid":"0000-0002-1837-2254"}],"publisher":"IEEE","doi":"10.1109/VLSI-SoC53125.2021.9606974","abstract":[{"text":"The design flow for field-programmable gate arrays (FPGAs), besides conventional methods of inserting Trojans into a design by a malicious entity, can also be surreptitiously compromised to assist an attacker to perform a successful malfunctioning or information leakage attack. The advanced stealthy malicious look-up-table (LUT) attack activates a Trojan only when generating the FPGA bitstream and can thus not be detected by register transfer and gate level testing and verification. This work aims to discuss a potential pre-configuration countermeasure against this “malicious LUT”-hardware Trojan, by employing bitstream-level Proof-Carrying Hardware (PCH). Further, this work proposes a novel attack that leverages malicious routing of the inserted Trojan circuit to acquire a dormant state even in the generated and transmitted bitstream, thus, the attack can currently neither be prevented by conventional testing and verification methods nor by bitstream-level verification techniques.","lang":"eng"}],"publication_identifier":{"eisbn":["978-1-6654-2614-5"]},"conference":{"location":"Singapore, Singapore","name":"2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC)","end_date":"2021-10-07","start_date":"2021-10-04"},"type":"conference","language":[{"iso":"eng"}],"date_updated":"2024-10-18T10:39:36Z","page":"1-2"}