Hardware Trojans in Reconfigurable Computing

The design flow for field-programmable gate arrays (FPGAs), besides conventional methods of inserting Trojans into a design by a malicious entity, can also be surreptitiously compromised to assist an attacker to perform a successful malfunctioning or information leakage attack. The advanced stealthy malicious look-up-table (LUT) attack activates a Trojan only when generating the FPGA bitstream and can thus not be detected by register transfer and gate level testing and verification. This work aims to discuss a potential pre-configuration countermeasure against this “malicious LUT”-hardware Trojan, by employing bitstream-level Proof-Carrying Hardware (PCH). Further, this work proposes a novel attack that leverages malicious routing of the inserted Trojan circuit to acquire a dormant state even in the generated and transmitted bitstream, thus, the attack can currently neither be prevented by conventional testing and verification methods nor by bitstream-level verification techniques.