{"year":"2018","publication_status":"published","status":"public","_id":"4486","citation":{"ama":"Ax J, Sievers G, Daberkow J, et al. CoreVA-MPSoC: A Many-Core Architecture with Tightly Coupled Shared and Local Data Memories. <i>IEEE Transactions on Parallel and Distributed Systems</i>. 2018;29(5):1030-1043. doi:<a href=\"https://doi.org/10.1109/TPDS.2017.2785799\">10.1109/TPDS.2017.2785799</a>","mla":"Ax, Johannes, et al. “CoreVA-MPSoC: A Many-Core Architecture with Tightly Coupled Shared and Local Data Memories.” <i>IEEE Transactions on Parallel and Distributed Systems</i>, vol. 29, no. 5, Institute of Electrical and Electronics Engineers (IEEE), 2018, pp. 1030–43, doi:<a href=\"https://doi.org/10.1109/TPDS.2017.2785799\">10.1109/TPDS.2017.2785799</a>.","bibtex":"@article{Ax_Sievers_Daberkow_Flasskamp_Vohrmann_Jungeblut_Kelly_Porrmann_Ruckert_2018, title={CoreVA-MPSoC: A Many-Core Architecture with Tightly Coupled Shared and Local Data Memories}, volume={29}, DOI={<a href=\"https://doi.org/10.1109/TPDS.2017.2785799\">10.1109/TPDS.2017.2785799</a>}, number={5}, journal={IEEE Transactions on Parallel and Distributed Systems}, publisher={Institute of Electrical and Electronics Engineers (IEEE)}, author={Ax, Johannes and Sievers, Gregor and Daberkow, Julian and Flasskamp, Martin and Vohrmann, Marten and Jungeblut, Thorsten and Kelly, Wayne and Porrmann, Mario and Ruckert, Ulrich}, year={2018}, pages={1030–1043} }","alphadin":"<span style=\"font-variant:small-caps;\"><span style=\"font-variant:small-caps;\">Ax, Johannes</span> ; <span style=\"font-variant:small-caps;\">Sievers, Gregor</span> ; <span style=\"font-variant:small-caps;\">Daberkow, Julian</span> ; <span style=\"font-variant:small-caps;\">Flasskamp, Martin</span> ; <span style=\"font-variant:small-caps;\">Vohrmann, Marten</span> ; <span style=\"font-variant:small-caps;\">Jungeblut, Thorsten</span> ; <span style=\"font-variant:small-caps;\">Kelly, Wayne</span> ; <span style=\"font-variant:small-caps;\">Porrmann, Mario</span> ; u. a.</span>: CoreVA-MPSoC: A Many-Core Architecture with Tightly Coupled Shared and Local Data Memories. In: <i>IEEE Transactions on Parallel and Distributed Systems</i> Bd. 29, Institute of Electrical and Electronics Engineers (IEEE) (2018), Nr. 5, S. 1030–1043","short":"J. Ax, G. Sievers, J. Daberkow, M. Flasskamp, M. Vohrmann, T. Jungeblut, W. Kelly, M. Porrmann, U. Ruckert, IEEE Transactions on Parallel and Distributed Systems 29 (2018) 1030–1043.","ieee":"J. Ax <i>et al.</i>, “CoreVA-MPSoC: A Many-Core Architecture with Tightly Coupled Shared and Local Data Memories,” <i>IEEE Transactions on Parallel and Distributed Systems</i>, vol. 29, no. 5, pp. 1030–1043, 2018.","apa":"Ax, J., Sievers, G., Daberkow, J., Flasskamp, M., Vohrmann, M., Jungeblut, T., … Ruckert, U. (2018). CoreVA-MPSoC: A Many-Core Architecture with Tightly Coupled Shared and Local Data Memories. <i>IEEE Transactions on Parallel and Distributed Systems</i>, <i>29</i>(5), 1030–1043. <a href=\"https://doi.org/10.1109/TPDS.2017.2785799\">https://doi.org/10.1109/TPDS.2017.2785799</a>","chicago":"Ax, Johannes, Gregor Sievers, Julian Daberkow, Martin Flasskamp, Marten Vohrmann, Thorsten Jungeblut, Wayne Kelly, Mario Porrmann, and Ulrich Ruckert. “CoreVA-MPSoC: A Many-Core Architecture with Tightly Coupled Shared and Local Data Memories.” <i>IEEE Transactions on Parallel and Distributed Systems</i> 29, no. 5 (2018): 1030–43. <a href=\"https://doi.org/10.1109/TPDS.2017.2785799\">https://doi.org/10.1109/TPDS.2017.2785799</a>."},"user_id":"220548","publication":"IEEE Transactions on Parallel and Distributed Systems","date_created":"2024-04-16T10:32:15Z","title":"CoreVA-MPSoC: A Many-Core Architecture with Tightly Coupled Shared and Local Data Memories","volume":29,"doi":"10.1109/TPDS.2017.2785799","author":[{"first_name":"Johannes","last_name":"Ax","full_name":"Ax, Johannes"},{"first_name":"Gregor","last_name":"Sievers","full_name":"Sievers, Gregor"},{"full_name":"Daberkow, Julian","last_name":"Daberkow","first_name":"Julian"},{"first_name":"Martin","full_name":"Flasskamp, Martin","last_name":"Flasskamp"},{"last_name":"Vohrmann","full_name":"Vohrmann, Marten","first_name":"Marten"},{"first_name":"Thorsten","orcid":"0000-0001-7425-8766","id":"242294","full_name":"Jungeblut, Thorsten","orcid_put_code_url":"https://api.orcid.org/v2.0/0000-0001-7425-8766/work/157787838","last_name":"Jungeblut"},{"full_name":"Kelly, Wayne","last_name":"Kelly","first_name":"Wayne"},{"first_name":"Mario","last_name":"Porrmann","full_name":"Porrmann, Mario"},{"first_name":"Ulrich","last_name":"Ruckert","full_name":"Ruckert, Ulrich"}],"issue":"5","publisher":"Institute of Electrical and Electronics Engineers (IEEE)","intvolume":"        29","language":[{"iso":"eng"}],"date_updated":"2024-04-17T07:11:30Z","page":"1030-1043","publication_identifier":{"issn":["1045-9219"]},"type":"journal_article"}